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package nes
// CPU memory map is:
// +--------------------------------------------------------------------------------------------------+
// | Address range | Size | Device |
// +--------------------------------------------------------------------------------------------------+
// | $0000-$07FF | $0800 | 2 KB internal RAM |
// | $0800-$0FFF | $0800 | Mirror of $0000-$07FF |
// | $1000-$17FF | $0800 | Mirror of $0000-$07FF |
// | $1800-1FFF | $0800 | Mirror of $0000-$07FF |
// | $2000-2007 | $0008 | PPU registers |
// | $2008-$3FFF | $1FF8 | Mirrors of $2000-$2007 (repeats every 8 bytes) |
// | $4000-4017 | $0018 | APU and I/O registers |
// | $4018-$401F | $0008 | APU and I/O functionality thats normally disabled (CPU test mode) |
// | $4020-$FFFF | $BFE0 | Unmapped, available for cartridge |
// | - $6000-$7FFF | $2000 | Usually cartridge RAM (if present) |
// | - $8000-$FFFF | $8000 | Usually cartridge ROM (if present) |
// +--------------------------------------------------------------------------------------------------+
// wow i put way too much effort into making that table
func (n *Console) Read(addr uint16) uint8 {
switch {
case addr < 0x2000: // internal RAM and mirrors
return n.RAM[addr&0x7FF]
case addr < 0x4000: // PPU registers, mirrored every 8 bytes
return n.PPU.ReadRegister(addr)
case addr == 0x4016: // controller 1
return n.controllers[0].read()
case addr == 0x4017: // controller 2
return n.controllers[1].read()
case addr >= 0x4020: // cartridge
return n.Cart.Mapper.CPURead(addr)
default:
return 0
}
}
func (n *Console) Write(addr uint16, v uint8) {
switch {
case addr < 0x2000:
n.RAM[addr&0x7FF] = v
case addr < 0x4000:
n.PPU.WriteRegister(addr, v)
case addr == 0x4014: // oam dma
n.oamDMA(v)
case addr == 0x4016: // strobe is shared by both controllers
n.controllers[0].setStrobe(v&1 != 0)
n.controllers[1].setStrobe(v&1 != 0)
case addr >= 0x4020:
n.Cart.Mapper.CPUWrite(addr, v)
}
}
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